Baseband SoC/ASIC Architect – 5G/6G Wireless

About the role

Huawei Sweden R&D is seeking a senior Baseband SoC/ASIC architect to lead the design of next‑generation computing architectures for 5.5/6G wireless baseband chips. The role is based in Stockholm and involves close collaboration with algorithm, hardware and software teams across Sweden and Shanghai.

Key responsibilities

• Define and design the SoC architecture for future wireless baseband products, targeting high computing performance.
• Evaluate, integrate and benchmark cutting‑edge IP blocks to maintain architectural leadership.
• Identify and resolve critical architectural bottlenecks through simulation and research.
• Collaborate with cross‑functional teams to ensure seamless integration of hardware, software and algorithmic components.

Required profile

• 5+ years of industrial or academic experience in SoC design, including processors, interconnects, memory systems and power optimization.
• Ph.D. in Electrical Engineering, Computer Architecture or a related field.
• Proven ability to lead complex technical projects in an international, multicultural environment.
• Fluent English communication skills, both written and spoken.

Required skills

• SoC architecture, processor and micro‑architecture design
• Interconnects, interfaces, scheduling, cache and DMA management
• Memory systems (SRAM, DRAM, cache)
• Power consumption analysis and design methodology
• Large‑scale parallel computing concepts
• Verilog / VHDL block design
• DSP, ARM and CPU micro‑architecture
• Vector, matrix and graph processing
• AI‑based computing architecture
• Multi‑threaded software development